E-mail: [email protected]: +49 351 463-39274Fax: +49 351 463-39995, Office: Helmholtzstrasse 18, BAR-III73-74, Phone: +49 (0)351 463-39925Fax: +49 (0)351 463-39995E-Mail: [email protected], E-Mail: [email protected]. 3, pp. 8. [doi], 08580544 S. Rai, M. Raitza, S. S. Sahoo, A. Kumar, "DISCERN: DISTILLING STANDARD CELLS FOR EMERGING RECONFIGURABLE NANOTECHNOLOGIES" , In Proceeding: 2020 Design, Automation Test in Europe Conference Exhibition (DATE), March 2020. He is currently working on adaptive near-memory computing systems.​. Shubham RAI of Technische Universität Dresden, Dresden (TUD) | Read 9 publications | Contact Shubham RAI S. Rai, M. Raitza, S. S. Sahoo, A. Kumar. Microelectronics and Semiconductor Engineering, A CORDIC Based Configurable Activation Function for ANN Applications, DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies, Exploiting Emerging Reconfigurable Technologies for Secure Devices, Hardware Watermarking Using Polymorphic Inverter Designs Based On Reconfigurable Nanotechnologies, Reconfigurable nanowire field effect transistors with volatile and nonvolatile configuration modes, Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors. 78-83, July 2020. S. Rai, J. Trommer, M. Raitza, T. Mikolajick, W. M. Weber, A. Kumar. Since then the technology has advanced from a viewpo... An early evaluation in terms of circuit design is essential in order to assess the feasibility and practicability aspects for emerging nanotechnologies. [PDF], https://cfaed.tu-dresden.de/publications?pubId=2860. Her current research interests include reconfigurable computing and approximate computing. E-Mail:[email protected]: +49 351 463-43727Fax: +49 351-463 39995. [doi], PID5531423 She has received the B.Sc. His research interests include computer architecture, VLSI design and approximate computing. degrees from Sharif University of Technology in Iran. He is currently working as a guest researcher with Chair for Processor design, focusing on "Implementation of Energy-efficient Deep Neural Networks for edge computing." Aditya Lohana is an undergraduate student at Birla Institute of Technology and Science, Hyderabad, India. Join Facebook to connect with Shubham Rai and others you may know. Emerging reconfigurable nanotechnologies: can they support future electronics? (Corresponding author: Shubham Rai.) An efficient ASIC-based hardware design of activation function (AF) in neural networks faces the challenge of offering functional configurability and limited chip area. G. Raut, S. Rai, S. K. Vishvakarma, A. Kumar. NEW VIDEOS EVERY TUESDAY, FRIDAY AND SUNDAY(8 p.m.IST) 3-5 VIDEOS EVERY WEEK Feel free to subscribe if you like my content. Reconfigurable nanotechnologies, such as silicon or germanium nanowire-based reconfigurable field-effect transistors, hold great promise as suitable primitives for enabling multiple functionalities... Several emerging reconfigurable technologies have been explored in recent years offering device level runtime reconfigurability. His research interests lie in the areas of Deep Learning and Distributed Systems. All rights reserved. 1. E-Mail: martin.bruestel (-) tu-dresden.dePhone: +49 351 463-43726Fax: +49 351-463 39995. Martin Bruestel is currently working as a research associate at the chair for Processor Design. [doi], Physical_Synthesis_DATE_2018 The proposed versatile configurable activation function is designed using CORDIC architecture and implements both tan hyperbolic and sigmoid function. 3. In order to optimally utilize the feature-sets of these technologies, circuit designs and storage elements requi... Join ResearchGate to find the people and research you need to help your work. The Monte-Carlo simulations for process-variations and device-mismatch are performed for both the proposed model and the state-of-the-art to evaluate expectations of functions of randomness in dynamic power variation. 27, no. With respect to the state-of-the-art, our design architecture shows improvement by 29% in area, 42% in power dissipation and 20% in latency. She is currently working on “Thermal Management in Multi-Core Real-Time Systems”. Zahra Ebrahimi works as a research associate with the Chair for Processor Design. Our circuit design is extracted in cadence virtuoso and simulated for all physical parameters. Shubham Rai PHD Researcher at cfaed - Center for Advancing Electronics Dresden Dresden, Sachsen, Deutschland IT und Services }, , no. A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs, Technology mapping flow for emerging reconfigurable silicon nanowire transistors, Institute of Semiconductors and Microsystems, Department of Computer Science and Engineering. DSD_final 13:1–13:8, New York, NY, USA, November 2018. Shubham Rai, Srivatsa Srinivasa, Patsy Cadareanu, Xunzhao Yin, Xiaobo Sharon Hu, Pierre-Emmanuel Gaillardon, Vijaykrishnan Narayanan, Akash Kumar. E-Mail: [email protected], E-Mail: [email protected], E-Mail: [email protected]. E-Mail: [email protected]. 5. Steffen Märcker is currently working as a research associate at the chair for Processor Design. The concept of reconfigurable field effect transistors (RFET) was proposed more than 10 years ago as a possibility to enhance the functionality of conventional field effect transistors by adding the option to reversibly adjust the polarity of the transistor by an electrical signal at runtime [1]. He joined the Chair for Processor Design at CFAED as a guest researcher in January 2020 and is working on “Exploiting FPGAs for Deep Reinforcement-Learning Based Systems”. To address this, we propose a configurable AF based on the shift-and-add algorithm, collectively known as Co-ordinate Rotation Digital Computer(CORDIC) algorithm. Chair for Emerging Electronic Technologies, Investigators & Participating Institutions, akhil[dot]baranwal[at]mailbox.tu-dresden.de. [PDF], https://cfaed.tu-dresden.de/publications?pubId=2593. He joined the Chair for Processor Design at CFAED as a visiting researcher in February 2020. 7. Suresh Nambi is an undergraduate student at Birla Institute of Technology and Science, Hyderabad Campus, India. Nusrat Jahan Lisa is currently working as a Research Associate in Processor Design and Database Technology groups at Technische Universität Dresden (TU Dresden), Germany. S. Rai, A. Rupani, P. Nath, A. Kumar. 767-772, March 2018. She received her Bachelor Degree in Computer Science and Engineering from Ahsanullah University of Science and Technology and Master Degree in Computer Science and Engineering from United International University, Bangladesh. Shubham Rai is on Facebook. , pp. [PDF], https://cfaed.tu-dresden.de/publications?pubId=2484, S. Rai, J. Trommer, M. Raitza, T. Mikolajick, W. M. Weber, A. Kumar, "Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors" , In IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. These technologies offer the freedom to choose between p- and n-type functionality from a single transistor. S. Rai, A. Rupani, D. Walter, M. Raitza, A. Heinzig, T. Baldauf, J. Trommer, C. Mayr, W. M. Weber, A. Kumar. [PDF], https://cfaed.tu-dresden.de/publications?pubId=1657, S. Rai, A. Rupani, D. Walter, M. Raitza, A. Heinzig, T. Baldauf, J. Trommer, C. Mayr, W. M. Weber, A. Kumar, "A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs" , In Proceeding: 2018 Design, Automation Test in Europe Conference Exhibition (DATE), vol.